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498 lines
12 KiB
498 lines
12 KiB
#include "gtest/gtest.h"
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#include "src/storage/BitVector.h"
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#include "src/exceptions/InvalidArgumentException.h"
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#include "src/exceptions/OutOfRangeException.h"
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TEST(BitVectorTest, InitToZero) {
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storm::storage::BitVector vector(32);
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for (uint_fast64_t i = 0; i < 32; ++i) {
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ASSERT_FALSE(vector.get(i));
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}
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ASSERT_TRUE(vector.empty());
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ASSERT_FALSE(vector.full());
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}
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TEST(BitVectorTest, InitToOne) {
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storm::storage::BitVector vector(32, true);
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for (uint_fast64_t i = 0; i < 32; ++i) {
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ASSERT_TRUE(vector.get(i));
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}
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ASSERT_FALSE(vector.empty());
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ASSERT_TRUE(vector.full());
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}
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TEST(BitVectorTest, InitFromIterator) {
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std::vector<uint_fast64_t> valueVector = {0, 4, 10};
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storm::storage::BitVector vector(32, valueVector.begin(), valueVector.end());
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ASSERT_EQ(32, vector.size());
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for (uint_fast64_t i = 0; i < 32; ++i) {
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if (i == 0 || i == 4 || i == 10) {
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ASSERT_TRUE(vector.get(i));
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} else {
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ASSERT_FALSE(vector.get(i));
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}
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}
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}
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TEST(BitVectorTest, GetSet) {
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storm::storage::BitVector vector(32);
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for (uint_fast64_t i = 0; i < 32; ++i) {
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vector.set(i, i % 2 == 0);
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}
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for (uint_fast64_t i = 0; i < 32; ++i) {
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ASSERT_EQ(i % 2 == 0, vector.get(i));
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}
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}
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TEST(BitVectorTest, GetAsInt) {
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storm::storage::BitVector vector(77);
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vector.set(62);
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vector.set(63);
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vector.set(64);
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vector.set(65);
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EXPECT_EQ(1, vector.getAsInt(62, 1));
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EXPECT_EQ(3, vector.getAsInt(62, 2));
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EXPECT_EQ(7, vector.getAsInt(62, 3));
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EXPECT_EQ(15, vector.getAsInt(62, 4));
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vector.set(64, false);
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EXPECT_EQ(1, vector.getAsInt(62, 1));
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EXPECT_EQ(3, vector.getAsInt(62, 2));
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EXPECT_EQ(6, vector.getAsInt(62, 3));
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EXPECT_EQ(13, vector.getAsInt(62, 4));
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vector.set(61);
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vector.set(62, false);
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EXPECT_EQ(2, vector.getAsInt(61, 2));
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}
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TEST(BitVectorTest, SetFromInt) {
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storm::storage::BitVector vector(77);
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vector.setFromInt(62, 1, 1);
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EXPECT_TRUE(vector.get(62));
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EXPECT_FALSE(vector.get(63));
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EXPECT_FALSE(vector.get(64));
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EXPECT_FALSE(vector.get(65));
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vector.setFromInt(61, 2, 2);
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EXPECT_TRUE(vector.get(61));
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EXPECT_FALSE(vector.get(62));
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EXPECT_FALSE(vector.get(63));
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vector.setFromInt(61, 3, 5);
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EXPECT_TRUE(vector.get(61));
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EXPECT_FALSE(vector.get(62));
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EXPECT_TRUE(vector.get(63));
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vector = storm::storage::BitVector(77);
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vector.setFromInt(62, 4, 15);
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EXPECT_TRUE(vector.get(62));
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EXPECT_TRUE(vector.get(63));
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EXPECT_TRUE(vector.get(64));
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EXPECT_TRUE(vector.get(65));
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vector.setFromInt(62, 5, 17);
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}
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TEST(BitVectorTest, GetSetInt) {
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storm::storage::BitVector vector(77);
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vector.setFromInt(63, 3, 2);
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EXPECT_EQ(2, vector.getAsInt(63, 3));
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}
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TEST(BitVectorDeathTest, GetSetAssertion) {
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storm::storage::BitVector vector(32);
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#ifndef NDEBUG
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#ifdef WINDOWS
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EXPECT_EXIT(vector.get(32), ::testing::ExitedWithCode(0), ".*");
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EXPECT_EXIT(vector.set(32), ::testing::ExitedWithCode(0), ".*");
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#else
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EXPECT_DEATH_IF_SUPPORTED(vector.get(32), "");
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EXPECT_DEATH_IF_SUPPORTED(vector.set(32), "");
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#endif
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#else
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std::cerr << "WARNING: Not testing GetSetAssertions, as they are disabled in release mode." << std::endl;
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SUCCEED();
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#endif
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}
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TEST(BitVectorTest, Resize) {
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storm::storage::BitVector vector(32);
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for (uint_fast64_t i = 0; i < 32; ++i) {
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vector.set(i);
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}
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vector.resize(70);
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ASSERT_EQ(70, vector.size());
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ASSERT_EQ(32, vector.getNumberOfSetBits());
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for (uint_fast64_t i = 0; i < 32; ++i) {
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ASSERT_TRUE(vector.get(i));
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}
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bool result;
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for (uint_fast64_t i = 32; i < 70; ++i) {
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result = true;
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ASSERT_NO_THROW(result = vector.get(i));
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ASSERT_FALSE(result);
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}
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vector.resize(72, true);
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ASSERT_EQ(72, vector.size());
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ASSERT_EQ(34, vector.getNumberOfSetBits());
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for (uint_fast64_t i = 0; i < 32; ++i) {
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ASSERT_TRUE(vector.get(i));
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}
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for (uint_fast64_t i = 32; i < 70; ++i) {
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result = true;
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ASSERT_NO_THROW(result = vector.get(i));
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ASSERT_FALSE(result);
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}
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for (uint_fast64_t i = 70; i < 72; ++i) {
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ASSERT_TRUE(vector.get(i));
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}
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vector.resize(16, 0);
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ASSERT_EQ(16, vector.size());
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ASSERT_EQ(16, vector.getNumberOfSetBits());
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for (uint_fast64_t i = 0; i < 16; ++i) {
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ASSERT_TRUE(vector.get(i));
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}
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vector.resize(65, 1);
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ASSERT_EQ(65, vector.size());
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ASSERT_TRUE(vector.full());
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}
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TEST(BitVectorTest, OperatorAnd) {
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storm::storage::BitVector vector1(32);
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storm::storage::BitVector vector2(32);
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for (int i = 0; i < 32; ++i) {
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vector1.set(i, i % 2 == 0);
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vector2.set(i, i % 2 == 1);
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}
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vector1.set(31);
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vector2.set(31);
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storm::storage::BitVector andResult = vector1 & vector2;
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for (uint_fast64_t i = 0; i < 31; ++i) {
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ASSERT_FALSE(andResult.get(i));
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}
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ASSERT_TRUE(andResult.get(31));
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}
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TEST(BitVectorTest, OperatorAndEqual) {
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storm::storage::BitVector vector1(32);
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storm::storage::BitVector vector2(32);
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for (int i = 0; i < 32; ++i) {
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vector1.set(i, i % 2 == 0);
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vector2.set(i, i % 2 == 1);
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}
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vector1.set(31);
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vector2.set(31);
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vector1 &= vector2;
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for (uint_fast64_t i = 0; i < 31; ++i) {
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ASSERT_FALSE(vector1.get(i));
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}
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ASSERT_TRUE(vector1.get(31));
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}
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TEST(BitVectorTest, OperatorOr) {
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storm::storage::BitVector vector1(32);
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storm::storage::BitVector vector2(32);
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for (uint_fast64_t i = 0; i < 32; ++i) {
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vector1.set(i, i % 2 == 0);
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vector2.set(i, i % 2 == 1);
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}
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vector1.set(31, false);
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vector2.set(31, false);
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storm::storage::BitVector orResult = vector1 | vector2;
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for (uint_fast64_t i = 0; i < 31; ++i) {
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ASSERT_TRUE(orResult.get(i));
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}
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ASSERT_FALSE(orResult.get(31));
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}
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TEST(BitVectorTest, OperatorOrEqual) {
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storm::storage::BitVector vector1(32);
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storm::storage::BitVector vector2(32);
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for (uint_fast64_t i = 0; i < 32; ++i) {
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vector1.set(i, i % 2 == 0);
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vector2.set(i, i % 2 == 1);
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}
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vector1.set(31, false);
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vector2.set(31, false);
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vector1 |= vector2;
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for (uint_fast64_t i = 0; i < 31; ++i) {
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ASSERT_TRUE(vector1.get(i));
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}
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ASSERT_FALSE(vector1.get(31));
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}
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TEST(BitVectorTest, OperatorXor) {
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storm::storage::BitVector vector1(32);
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storm::storage::BitVector vector2(32);
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for (uint_fast64_t i = 0; i < 32; ++i) {
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vector1.set(i);
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vector2.set(i, i % 2 == 1);
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}
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storm::storage::BitVector vector3 = vector1 ^ vector2;
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storm::storage::BitVector vector4 = ~vector2;
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storm::storage::BitVector vector5 = vector1 ^ vector1;
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for (uint_fast64_t i = 0; i < 32; ++i) {
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ASSERT_EQ(vector3.get(i), vector4.get(i));
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ASSERT_FALSE(vector5.get(i));
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}
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}
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TEST(BitVectorTest, OperatorModulo) {
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storm::storage::BitVector vector1(32);
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storm::storage::BitVector vector2(32);
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for (uint_fast64_t i = 0; i < 15; ++i) {
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vector2.set(i, i % 2 == 0);
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}
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vector1.set(2);
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vector1.set(5);
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vector1.set(6);
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storm::storage::BitVector moduloResult = vector1 % vector2;
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ASSERT_EQ(moduloResult.size(), 8);
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ASSERT_EQ(moduloResult.getNumberOfSetBits(), 2);
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for (uint_fast64_t i = 0; i < 8; ++i) {
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if (i == 1 || i == 3) {
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ASSERT_TRUE(moduloResult.get(i));
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} else {
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ASSERT_FALSE(moduloResult.get(i));
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}
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}
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storm::storage::BitVector vector3(31);
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for (uint_fast64_t i = 0; i < 15; ++i) {
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vector3.set(i, i % 2 == 0);
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}
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#ifndef NDEBUG
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#ifdef WINDOWS
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EXPECT_EXIT(vector1 % vector3, ::testing::ExitedWithCode(0), ".*");
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#else
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EXPECT_DEATH_IF_SUPPORTED(vector1 % vector3, "");
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#endif
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#else
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std::cerr << "WARNING: Not testing OperatorModulo size check, as assertions are disabled in release mode." << std::endl;
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SUCCEED();
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#endif
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}
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TEST(BitVectorTest, OperatorNot) {
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storm::storage::BitVector vector1(32);
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storm::storage::BitVector vector2(32);
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for (uint_fast64_t i = 0; i < 32; ++i) {
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vector1.set(i, i % 2 == 0);
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vector2.set(i, i % 2 == 1);
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}
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storm::storage::BitVector notResult = ~vector2;
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for (uint_fast64_t i = 0; i < 32; ++i) {
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ASSERT_EQ(vector1.get(i), notResult.get(i));
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}
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}
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TEST(BitVectorTest, Complement) {
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storm::storage::BitVector vector1(32);
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storm::storage::BitVector vector2(32);
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for (uint_fast64_t i = 0; i < 32; ++i) {
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vector1.set(i, i % 2 == 0);
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vector2.set(i, i % 2 == 1);
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}
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vector2.complement();
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for (uint_fast64_t i = 0; i < 32; ++i) {
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ASSERT_EQ(vector1.get(i), vector2.get(i));
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}
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}
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TEST(BitVectorTest, Implies) {
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storm::storage::BitVector vector1(32);
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storm::storage::BitVector vector2(32, true);
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for (uint_fast64_t i = 0; i < 32; ++i) {
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vector1.set(i, i % 2 == 0);
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}
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vector2.set(31, false);
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vector2.set(30, false);
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storm::storage::BitVector impliesResult = vector1.implies(vector2);
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for (uint_fast64_t i = 0; i < 30; ++i) {
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ASSERT_TRUE(impliesResult.get(i));
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}
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ASSERT_FALSE(impliesResult.get(30));
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ASSERT_TRUE(impliesResult.get(31));
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}
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TEST(BitVectorTest, Subset) {
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storm::storage::BitVector vector1(32);
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storm::storage::BitVector vector2(32, true);
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for (uint_fast64_t i = 0; i < 32; ++i) {
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vector1.set(i, i % 2 == 0);
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}
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ASSERT_TRUE(vector1.isSubsetOf(vector2));
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vector2.set(16, false);
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ASSERT_FALSE(vector1.isSubsetOf(vector2));
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}
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TEST(BitVectorTest, Disjoint) {
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storm::storage::BitVector vector1(32);
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storm::storage::BitVector vector2(32);
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for (uint_fast64_t i = 0; i < 32; ++i) {
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vector1.set(i, i % 2 == 0);
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vector2.set(i, i % 2 == 1);
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}
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ASSERT_TRUE(vector1.isDisjointFrom(vector2));
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vector2.set(16, true);
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ASSERT_FALSE(vector1.isDisjointFrom(vector2));
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}
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TEST(BitVectorTest, Empty) {
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storm::storage::BitVector vector(32);
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ASSERT_TRUE(vector.empty());
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vector.set(17, true);
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ASSERT_FALSE(vector.empty());
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vector.set(17, false);
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vector.set(18, false);
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ASSERT_TRUE(vector.empty());
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}
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TEST(BitVectorTest, Full) {
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storm::storage::BitVector vector(32, true);
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ASSERT_TRUE(vector.full());
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vector.set(17, false);
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ASSERT_FALSE(vector.full());
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vector.set(17, true);
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vector.set(18, true);
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ASSERT_TRUE(vector.full());
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}
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TEST(BitVectorTest, NumberOfSetBits) {
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storm::storage::BitVector vector(32);
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for (uint_fast64_t i = 0; i < 32; ++i) {
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vector.set(i, i % 2 == 0);
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}
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ASSERT_EQ(16, vector.getNumberOfSetBits());
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}
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TEST(BitVectorTest, NumberOfSetBitsBeforeIndex) {
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storm::storage::BitVector vector(32);
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for (uint_fast64_t i = 0; i < 32; ++i) {
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vector.set(i, i % 2 == 0);
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}
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ASSERT_EQ(7, vector.getNumberOfSetBitsBeforeIndex(14));
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}
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TEST(BitVectorTest, BeginEnd) {
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storm::storage::BitVector vector(32);
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ASSERT_TRUE(vector.begin() == vector.end());
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vector.set(17);
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ASSERT_FALSE(vector.begin() == vector.end());
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vector.set(17, false);
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ASSERT_TRUE(vector.begin() == vector.end());
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}
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TEST(BitVectorTest, NextSetIndex) {
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storm::storage::BitVector vector(32);
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vector.set(14);
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vector.set(17);
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ASSERT_EQ(14, vector.getNextSetIndex(14));
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ASSERT_EQ(17, vector.getNextSetIndex(15));
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ASSERT_EQ(17, vector.getNextSetIndex(16));
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ASSERT_EQ(17, vector.getNextSetIndex(17));
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ASSERT_EQ(vector.size(), vector.getNextSetIndex(18));
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}
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TEST(BitVectorTest, Iterator) {
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storm::storage::BitVector vector(32);
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for (uint_fast64_t i = 0; i < 32; ++i) {
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vector.set(i, i % 2 == 0);
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}
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for (auto bit : vector) {
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ASSERT_TRUE(bit % 2 == 0);
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}
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}
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