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| <meta name="DC.Title" content="Introducing Intel® Threading Building Blocks"> | |
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|   <h1 class="topictitle1">Introducing Intel® Threading Building Blocks</h1> | |
|   | |
|     | |
|   <div>  | |
| 	 <p>Intel® Threading Building Blocks (Intel® TBB) is a | |
| 		library that supports scalable parallel programming using standard ISO C++ | |
| 		code. It does not require special languages or compilers. It is designed to | |
| 		promote scalable data parallel programming. Additionally, it fully supports | |
| 		nested parallelism, so you can build larger parallel components from smaller | |
| 		parallel components. To use the library, you specify tasks, not threads, and | |
| 		let the library map tasks onto threads in an efficient manner.  | |
| 	 </p> | |
|   | |
| 	 <p>Many of the library interfaces employ generic | |
| 		programming, in which interfaces are defined by requirements on types and not | |
| 		specific types. The C++ Standard Template Library (STL) is an example of | |
| 		generic programming. Generic programming enables Intel® TBB to be flexible yet | |
| 		efficient. The generic interfaces enable you to customize components to your | |
| 		specific needs.  | |
| 	 </p> | |
|   | |
| 	 <p>The net result is that Intel® TBB enables you to | |
| 		specify parallelism far more conveniently than using raw threads, and at the | |
| 		same time can improve performance.  | |
| 	 </p> | |
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| 	 <p>  | |
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| 				<th class="cellrowborder" align="left" valign="top" width="100%" id="d608e50"> | |
| 				  <p>Optimization Notice | |
| 				  </p> | |
| 
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| 				</th> | |
| 
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| 			 </tr> | |
| </thead> | |
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| 				  Intel's compilers may or may not optimize to the same degree for non-Intel | |
| 				  microprocessors for optimizations that are not unique to Intel microprocessors. | |
| 				  These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other | |
| 				  optimizations. Intel does not guarantee the availability, functionality, or | |
| 				  effectiveness of any optimization on microprocessors not manufactured by Intel. | |
| 				  Microprocessor-dependent optimizations in this product are intended for use | |
| 				  with Intel microprocessors. Certain optimizations not specific to Intel | |
| 				  microarchitecture are reserved for Intel microprocessors. Please refer to the | |
| 				  applicable product User and Reference Guides for more information regarding the | |
| 				  specific instruction sets covered by this notice.  | |
| 				  <p>Notice revision #20110804  | |
| 				  </p> | |
| 
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| 	 </p> | |
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|   </div> | |
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| 
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| <div class="familylinks"> | |
| <div class="parentlink"><strong>Parent topic:</strong> <a href="../main/title.htm">Intel® Threading Building Blocks Documentation</a></div> | |
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