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98 lines
2.8 KiB
98 lines
2.8 KiB
// Translation of the MAPA Specification of a mutex system into PRISM code
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// http://wwwhome.cs.utwente.nl/~timmer/scoop/papers/qest13/index.html
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ma
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const int N; // The size of the data (should be at most 6)
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formula someEnter = s1=1 | s2=1 | s3=1;
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formula someWait = s1=2 | s2=2 | s3=2;
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formula someLow = s1=3 | s2=3 | s3=3;
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formula someHigh = s1=4 | s2=4 | s3=4;
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formula someTie = s1=5 | s2=5 | s3=5;
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formula someAdmit = s1=6 | s2=6 | s3=6;
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formula otherHigh = s2=4 | s3=4;
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formula someLowTie = someLow | someTie;
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formula someLowHighTie = someLow | someHigh | someTie;
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formula someAdmitHighTie = someAdmit | someHigh | someTie;
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formula someEnterWait = someEnter | someWait;
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module process1
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// The internal state of the process
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// 0: uninterested
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// 1: enter
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// 2: wait
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// 3: low
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// 4: high
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// 5: tie
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// 6: admit
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s1 : [0..6];
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// the phase of the protocol
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phase1 : [1..12];
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// The considered data
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data1 : [1..N];
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// The result of a coin flip
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h1 : bool;
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//[] phase1=1 -> 1 : true;
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[] phase1=1 -> 1 : (phase1'=2);
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[] phase1=2 & N>=1 -> 1 : (data1'=1) & (phase1'=3);
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[] phase1=2 & N>=2 -> 1 : (data1'=2) & (phase1'=3);
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[] phase1=2 & N>=3 -> 1 : (data1'=3) & (phase1'=3);
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[] phase1=2 & N>=4 -> 1 : (data1'=4) & (phase1'=3);
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[] phase1=2 & N>=5 -> 1 : (data1'=5) & (phase1'=3);
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[] phase1=2 & N>=6 -> 1 : (data1'=6) & (phase1'=3);
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[] phase1=3 & (someLowHighTie & !someAdmit) -> 1 : (s1'=2) & (phase1'=4);
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[] phase1=3 & (!someLowHighTie | someAdmit) -> 0.5 : (phase1'=5) & (h1'=false) + 0.5 : (phase1'=5) & (h1'=true);
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[] phase1=4 & (!someLowHighTie | someAdmit) -> 1 : (s1'=1) & (phase1'=3);
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[] phase1=5 & h1=false -> 1 : (s1'=3) & (phase1'=6);
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[] phase1=5 & h1=true -> 1 : (s1'=4) & (phase1'=7) & (h1'=false);
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[] phase1=6 & !someAdmitHighTie -> 1 : (s1'=5) & (phase1'=8);
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[] phase1=7 & (someAdmit | otherHigh) -> 1 : (s1'=5) & (phase1'=9);
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[] phase1=7 & (!someAdmit & !otherHigh) -> 1 : (phase1'=10);
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[] phase1=8 -> 0.5 : (phase1'=5) & (h1'=false) + 0.5 : (phase1'=5) & (h1'=true);
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[] phase1=9 & !someAdmit & !otherHigh -> 0.5 : (phase1'=5) & (h1'=false) + 0.5 : (phase1'=5) & (h1'=true);
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<> phase1=10 -> data1 : (phase1'=11) & (data1'=1);
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[] phase1=11 & (someLowTie | otherHigh) & !someEnter -> 1 : (s1'=0) & (phase1'=1);
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[] phase1=11 & !someLowTie & !otherHigh -> 1 : (s1'=6) & (phase1'=12);
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[] phase1=12 & !someEnterWait -> 1 : (s1'=0) & (phase1'=1);
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endmodule
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module process2 = process1 [ s1=s2, phase1=phase2, data1=data2, h1=h2, s2=s1] endmodule
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module process3 = process1 [ s1=s3, phase1=phase3, data1=data3, h1=h3, s3=s1] endmodule
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label "crit1" = phase1=10;
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label "crit2" = phase2=10;
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label "crit3" = phase3=10;
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rewards "timeInCrit1"
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phase1=10 : 1;
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endrewards
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rewards "timeInCrit2"
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phase2=10 : 1;
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endrewards
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rewards "timeInCrit3"
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phase3=10 : 1;
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endrewards
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